The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 12, 1998
Filed:
Nov. 12, 1996
Electronics and Telecommunications Research Institute, Daejeon, KR;
Abstract
A non-blocking fault tolerant gamma network for a multi-processor system is disclosed, including: N dual links respectively connected to n source nodes, and for transmitting data input; a first stage made up with n 2.times.3 switching devices for outputting data transmitted from the N dual links; a second stage made up with n 3.times.4 switching devices for outputting data output from the first stage; a third stage to n-1 stage made up with (n-2).times.N 4.times.4 switching devices for receiving data output from the second stage at the third stage and outputting the data to n-1 stage; an n stage made up with n 4.times.2 circuits for receiving data output from the n-1 stage and outputting the data; and n dual links connected to n destination nodes for transmitting data output from the n stage, whereby the links, which connect the n source nodes, switching devices of the interconnection network and n destination nodes, are designed according to the connection formula of the certain regulation, thus simultaneously set all paths between a plurality of sources and a plurality of destinations, and tolerate a single-switching fault or a single-link fault in the interconnection network.