The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 12, 1998
Filed:
Apr. 28, 1995
Harold H Speed, III, McKinney, TX (US);
James C Spurlin, Sherman, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A circuit and method for providing a bus switch that translates voltage from one level to a second, lower level. A FET bus switch transistor 310 is integrated on the same silicon chip 320 with one or more diodes 330 in series with Vcc, the power supply 340. A bias current source 350 is included to bias the diode. The diodes and current source are configured to provide additional voltage translation so that when a control input couples the input pin at the source of the FET bus switch to the output pin at the drain of the FET bus switch, the voltage at the output pin can be placed at a predetermined level. The bus switch thus acts as both a bus coupling device and a voltage translation device.