The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 1998

Filed:

Apr. 04, 1996
Applicant:
Inventors:

Shumpei Kawasaki, Kodaira, JP;

Kaoru Fukada, Koganei, JP;

Mitsuru Watabe, Uridura, JP;

Kouki Noguchi, Kokubunji, JP;

Kiyoshi Matsubara, Higashimurayama, JP;

Isamu Mochizuki, Tachikawa, JP;

Kazufumi Suzukawa, Ichikawa, JP;

Shigeki Masumura, Kodaira, JP;

Yasushi Akao, Kokubunji, JP;

Eiji Sakakibara, Kodaira, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
395800 ; 395402 ; 395403 ; 395404 ; 395405 ; 395411 ; 39542101 ; 39542102 ; 395307 ; 395823 ;
Abstract

A microcomputer that is easy to use and connected direct to such memories as dynamic and static RAM's and to other peripheral circuits. The microcomputer has strobe signal output terminals CASH*, CASL* and RAS* for direct connection to a dynamic RAM, and chip select signal output terminals CS0* through CS6* for outputting a chip select signal in parallel with the output from the strobe signal output terminals. The microcomputer further includes address output terminals for outputting a non-multiplexed or multiplexed address signal as needed, and data I/O terminals for selectively outputting the address signal to comply with a multiple-bus interface scheme.


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