The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 1998

Filed:

May. 13, 1996
Applicant:
Inventors:

Hikaru Ito, Mobara, JP;

Masataka Natori, Mobara, JP;

Masahiko Suzuki, Mobara, JP;

Kimitoshi Ohgiichi, Mobara, JP;

Kuniyuki Matsunaga, Yokohama, JP;

Junichi Ohwada, Mobara, JP;

Masumi Sasuga, Mobara, JP;

Shiro Ueda, Mobara, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G02F / ;
U.S. Cl.
CPC ...
349152 ; 349149 ;
Abstract

A liquid crystal display device is provided which reduces the resistance of input wires disposed between a flexible board and driving ICs mounted in a flip-chip style, and enhances resistance against electrocorrosion of input terminals thereof. The liquid crystal display device includes two transparent insulating substrates (SUB1, SUB2) confronting each other through a liquid crystal layer, plural liquid crystal driving circuits (ICs) mounted in a flip-chip style on a surface of one of the substrates located at the side of the liquid crystal layer, a flexible board (FPC) for inputting a signal to each of the liquid crystal driving circuits, and plural input wires (Td) provided on the surface of the one substrate at the side of the liquid crystal layer to connect output terminals of the flexible board to input terminals of the liquid crystal driving circuits. Each input wire includes a first metal layer (g1) in the vicinity of the surface of the substrate, a transparent conductive layer (d1) laminated on the first metal layer, connected to the input terminals of the flexible board, with open portions in the neighborhood of the input terminals of the liquid crystal driving circuits and in the neighborhood of the output terminals of the flexible board, a second metal layer (d2) laminated on the transparent conductive film and connected to the first metal layer at the open portions, and a protection film (PSV1) covering at least the second metal layer.


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