Two cascoded transistor chains biasing dac current cells

Abstract

A precise current cell for a digital-to-analog (D/A) convertor circuit is designed to compensate for manufacturing process variations. The cell uses a cascoded transistor chain to control the output voltage and isolate voltage supply noise. An external (off-chip) bias current is fed into a cascoded biasing string of eight transistors, which are further mirrored to the current cell itself. The biasing scheme accounts for manufacturing process variations in the chip, which leads to very precise current being replicated at the output of the D/A circuit. Current steering and an improved shunt path within the current cell minimizes voltage swings during switching of the current cell. This allows for faster switching of the cell while minimizing noise coupling due to the voltage swings. The current cell also has an associated biasing stage. This biasing stage allows for improved matching within the current cell, resulting in improved accuracy of conversion. Additionally, the biasing circuit minimizes noise coupling from ground potential to the D/A convertor output. A reset circuit is also included. This current cell, associated biasing stage, and reset circuit is suitable for applications requirement precise D/A conversions at high speeds.