The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 05, 1998
Filed:
Dec. 05, 1996
Korea Information & Communication Co., Ltd., Seoul, KR;
Other;
Abstract
The present invention privides a method for manufacturing an ISRC MOSFET, comprising steps of forming an isolating layer through the LOCOS process, depositing a mask oxide layer, exposing only the part of silicon substrate for forming the channel and shallow junction of source/drain layers, depositing the first nitride layer over the resultant substrate, dry-etching the first nitride layer to form a nitride side-wall, forming an oxide layer being recessed into the channel, wet-etching the nitride side-wall, forming two doped layers for the shallow source/drain by an N.sup.+ or P.sup.+ ion-implantation, depositing the second nitride layer, dry-etching for forming a nitride side-wall, forming a P.sup.- or N.sup.- doped layer between the two doped layers, forming a gate oxide layer on the P.sup.- or N.sup.- doped layer, depositing a poly-silicon layer, forming a poly-silicon gate by a llithography process and a dry-etching process, etching away the mask oxide layer, and ion-implanting for thick source/drain junction.