The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 28, 1998
Filed:
May. 25, 1995
Syugo Yamashita, Osaka, JP;
Yoshikazu Tomida, Hirakata, JP;
Masayuki Takada, Tokyo, JP;
Toru Kuroda, Tokyo, JP;
Tadashi Isobe, Tokyo, JP;
Osamu Yamada, Tokyo, JP;
Sanyo Electric Co., Ltd., Osaka, JP;
Nippon Hoso Kyokai, Tokyo, JP;
Abstract
An error correcting decoder includes a flag memory (20) which stores a flag indicative of a success of an error correction for a bit. When a column direction error correction is to be performed, if a flag for a bit indicates a success, no error correction is performed for the bit. That is, an output of a majority logic circuit (78) is forcedly made invalid. In performing the column direction error correction, if the number of success packets in a first-time row direction error correction is smaller than a predetermined value and if the number of bits corrected by the column direction error correction becomes equal to or larger than a predetermined number, it is deemed as that the column direction error correction is unsuccessful. In performing a second-time row direction error correction, when a threshold value is equal to or larger than a predetermined value, the majority logic circuit determines with referring to a result of the column direction error correction, but without referring to the result when the threshold value is smaller than the predetermined value.