High-speed programmable read only memory

Abstract

Each column in the memory array of transistors of a programmable read only memory (ROM) can be programmed in either a conventional mode or an inverted mode. In the conventional mode, each transistor is either programmed (i.e., connected to the corresponding bit line) or unprogrammed (i.e., left unconnected to the corresponding bit line). In this way, the programming mode can be selected, independently for each column, to limit the maximum number of transistors that can be programmed in any given column to one half of the total number of transistors in the column. As such, the total capacitance along a bit line is reduced and the access time is therefore also reduced, resulting in a faster ROM. The information as to which columns are encoded using which programming modes is contained in a component of the ROM. That programming-mode information is accessed when reading data out of the memory array to determine whether or not to invert the data for the various columns.