System and mechanism for assigning pre-established electronic addresses

Abstract

A software implemented control mechanism is used in a test system for assigning unique pre-established electronic addresses which are to be written into the memory elements of printed circuit boards during the manufacture thereof. Each PCB is previously encoded with a scannable board serial number label, and the test system includes a processing unit and a memory configured for storing test software for testing PCBs. The control mechanism is incorporated into the test software which when installed into the test system configures the system's memory for assigning electronic addresses. The control mechanism includes first and second sets of tables containing entries which define the ranges of valid serial numbers and preallocated electronic addresses. A control element within the control mechanism invokes a number of offset computation subroutines which generates an offset value derived from the serial number read from the PCB being processed defining the relative position of the serial number as determined by entry values contained in the first set of tables. The control element provides the received offset value to a number of effective address subroutines which it invokes to select a valid unique electronic address value contained in the ranges of pre-established electronic addresses defined by the entry values contained in the second set of tables.