The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 1998

Filed:

May. 12, 1997
Applicant:
Inventor:

Mark Schneider, San Jose, CA (US);

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K / ; H05K / ;
U.S. Cl.
CPC ...
425110 ; 118641 ; 118600 ; 118213 ; 118255 ; 118256 ; 118406 ; 26427217 ;
Abstract

System for producing a plurality of semiconductor device assemblies utilizing a grid array of conductive epoxy for connecting them to an electronic system. Conductive epoxy is screen printed in a desired pattern onto a printed wire board of the semiconductor device assembly. The conductive epoxy is B-staged by heating in an oven. The semiconductor device assembly is then placed onto a system printed circuit board wherein the B-staged conductive epoxy is further cured by heat and effectively makes mechanical and electrical connections between the semiconductor device assembly and the system printed circuit board.


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