The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 14, 1998
Filed:
Dec. 13, 1995
Takao Fukui, Kanagawa, JP;
Kazutoshi Nomoto, Kanagawa, JP;
Sony Corporation, , US;
Abstract
In addition to an output Y(n) of an adding device, a dither output of a dither generating circuit is supplied to an adding device. The output Y(n) of the adding device is added to a bit that is one bit lower than the LSB of the shortest word length of the hardware (namely, the place of LSB/2). The output of the adding device is supplied to a delay device. In other words, when the shorter word length is 32 bits corresponding to the word length of the RAM of the delay device, the dither is added to the bit 33. In the data Y(n) to which the dither has been added, the low order bits thereof are truncated corresponding to the word length of the delay device. The resultant data is supplied as next timing output data Y'(n-1) to the delay device and stored therein.