The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 1998

Filed:

Sep. 15, 1995
Applicant:
Inventors:

Daniel F Devoe, Coronado, CA (US);

Alan D Devoe, La Jolla, CA (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01G / ;
U.S. Cl.
CPC ...
3613211 ; 3613212 ; 361312 ; 361328 ; 3613011 ;
Abstract

Metal, normally gold or platinum, is printed, and is adhered by a glass frit, on the top and/or bottom surfaces of a multi-layer laid-up green ceramic wafers containing typically up to 16 layers and 800+ separate devices, typically 800+ monolithic, buried-substrate, ceramic multiple capacitors. The wafer is diced, and the multiple ceramic capacitors each with its patterned surface metal are co-fired. The integrally formed, top and bottom surface, conduction traces connect similarly formed pads, typically disposed in a 'pin-grid' pattern, to later-added side traces or conductive castellations that connect to the electrodes of multiple buried-substrate capacitors. The pads are precisely located, and extend over such ample areas, to support the stable surface mounting, and the reliable electrical connection of, diverse external electrical circuits and components. The surface mounting may be by and of adhering with conductive adhesive, soldering, reflow soldering, gold wire bonded, aluminum wire bonding, flip-chip mounting, die bonding and like processes, including automated processes. The pads on the bottom surface typically support mounting the ceramic multiple capacitor to a printed circuit board, flexible substrate, alumina substrate, multi-chip module or the like. Meanwhile, pads on the top surface typically support the physical mounting and electrical connection of one or more electrical circuits--including ICs--or components piggyback on top of the multiple capacitor, including in a dense three-dimensional multi-tier, tower, arrangement.


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