The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 1998

Filed:

May. 20, 1996
Applicant:
Inventors:

Rajesh Bhikhubhai Patel, Austin, TX (US);

Romesh Mangho Jessani, Austin, TX (US);

Belliappa Manavattira Kuttana, Austin, TX (US);

Assignees:

International Business Machines Corporation, Armonk, NY (US);

Motorola, Inc., Schaumburg, IL (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
711123 ; 711125 ; 711129 ; 711133 ; 364D / ;
Abstract

A microprocessor that dynamically shares cache capacity comprising a controller that determines if all ways for a congruence class of a requested instruction are valid in the instruction cache and if a replacement way for the congruence class of the requested instruction is valid in a data cache. A lookup for the instruction is performed in the cache tags for the instruction cache and the data cache. If a hit occurs in either cache, the instruction is retrieved. If a miss occurs for the instruction in both the instruction cache and the data cache, the controller loads the instruction into either the instruction cache, if the replacement way is valid in the data cache or at least one way for the congruence class of the requested instruction is not valid in the instruction cache, or the data cache, if the replacement way is not valid in the data cache and all ways for the congruence class of the requested instruction are valid in the instruction cache.


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