The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 1998

Filed:

Jul. 14, 1995
Applicant:
Inventors:

Jonathan W Byrn, Rochester, MN (US);

Gary S Delp, Rochester, MN (US);

Philip L Leichty, Rochester, MN (US);

Robert J Manulik, Rochester, MN (US);

Arthur J Meyer, III, Oronoco, MN (US);

Albert A Slane, Oronoco, MN (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
395888 ; 395882 ; 395885 ; 395611 ;
Abstract

A method and apparatus are disclosed for providing an inline data service within a data processing system coupled to a communications network. The data processing system includes a host memory. According to the present invention, the apparatus comprises an adapter memory for temporarily storing data communicated between the data processing system and the communications network and a memory access controller, which controls transfers of data between the adapter memory and the host memory. The apparatus further includes means for selectively performing a data transformation on data transferred between the adapter memory and the host memory, wherein the data transformation is performed during a transfer of the data such that data communication latency is reduced. In a second preferred embodiment of the present invention, a multibus data processing system has a processor and a first memory coupled to a first bus and a second memory coupled to a second bus. A bridge adapter, including means for transferring data from the first memory to the second memory and means for selectively performing a data transformation, is coupled between the first and second buses. During transfers of data from the first memory to the second memory, the bridge adapter selectively performs data transformations on the data, such that data processing latency is reduced.


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