Fuzzy logic membership function generating apparatus

Abstract

A digital fuzzy logic processor for generating output data representing a degree of membership function, specifically, a complement-generating circuit that generates complement data for outputting to a one's-complement circuit to determine a degree of membership output. The digital fuzzy logic processor includes an input port, a memory unit for storing a plurality of data and a prescaled base-distance-slope product table, a subtracting and multiplexer circuit to generate relative location signals and relative distance data, and a control unit that controls the processor. The logic processor further includes a pre-scale shifter to generate prescaled relative distance data, an address generator to generate a table address to retrieve a base-distance-slope product from the prescaled base-distance-slope product table, and a post scalar shifter to shift prescaled base-distance-slope products to generate complement data. Also included in the processor are a one's-complement circuit and a multiplexer to generate output data representing a degree of membership function.