The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 07, 1998
Filed:
Mar. 27, 1996
Hidekazu Takata, Nara, JP;
Thomas Mnich, Woodland Park, CO (US);
David Novosel, New Wilmington, PA (US);
Sharp Kabushiki Kaisha, , JP;
Abstract
A reference scheme for a Dynamic Shadow Random Access Memory which provides a reference voltage circuit used for determining the data state of a ferroelectric memory cell operating in either dynamic (DRAM) or nonvolatile (NVRAM) modes. The reference voltage circuit includes two ferroelectric capacitors with associated data state setting transistors such that in either DRAM or NVRAM operating mode, the two capacitors store opposite data states. The circuit also includes means for alternating the data state of each capacitor. In operation, the ferroelectric capacitors are discharged to associated bitlines producing voltages which are averaged to derive a half-state reference voltage level. The reference voltage is used to determine the state of an associated memory cell. Additionally, a ferroelectric memory circuit is provided which includes an array of reference voltage circuits configured and operated in a manner to reduce the fatigue and imprinting experienced by the reference capacitors.