The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 1998

Filed:

Jan. 23, 1996
Applicant:
Inventors:

Hiroshi Shimomura, Osaka, JP;

Kiyoyuki Morita, Kyoto, JP;

Takashi Nakabayashi, Osaka, JP;

Takashi Uehara, Osaka, JP;

Mitsuo Yasuhira, Osaka, JP;

Mizuki Segawa, Osaka, JP;

Takehiro Hirai, Osaka, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 52 ; 437 60 ; 437919 ;
Abstract

Mounted on a single semiconductor substrate are a DRAM, MOS transistor, resistor, and capacitor. The gate electrode of the DRAM and the gate electrode of the MOS transistor are formed by a common layer (i.e., a first-level poly-Si layer). The storage electrode of the DRAM. the resistor, and the lower electrode of the capacitor are formed by a common layer (i.e., a third-level poly-Si layer). The plate electrode of the DRAM and the upper electrode of the capacitor are formed by a common layer (i.e., a fourth-level poly-Si layer).


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