The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 1998

Filed:

Feb. 21, 1996
Applicant:
Inventor:

Harumi Mizunashi, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B32B / ;
U.S. Cl.
CPC ...
428209 ; 428210 ; 428901 ;
Abstract

A multilayer printed circuit board has a substrate, an inner interconnection layer formed on each surface of the substrate, and an outer interconnection layer overlying each inner interconnection layer. The inner interconnection layer is formed of a copper sheet and two latticed metal films made of a metal having a low thermal expansion coefficient and bonded to boty surfaces of the copper sheet under application of pressure. The area ratio of exposed portions of the copper sheet to the whole surface of the interconnection layer is between 25 and 75%. Thermal expansion coefficient of the resultant circuit board is lowered to be close to the thermal expansion coefficient of a LSI, thereby obtaining reliability of a electronic product due to a low thermal stress. The metallic film is made of Kovar or Invar.


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