Direct memory access controller in an integrated circuit

Abstract

A direct memory access controller controls many direct memory access ports using a token passing scheme. The system multiplexes the port's accesses to external random access memory by daisy-chaining a loop of direct access memory ports and passing the token around to each port. Once a port receives the token it may request as many random access memory accesses as it requires. These accesses may be either read operations or write operations with both using the same multiplexed data bus. The latency inherent in reading an external RAM causes no loss in the access efficiency. When the port has completed its data transfer or if the port does not require a data transfer, the token is passed to the next direct memory access port for its data transfer. The token is passed around to all connected ports until all have had an opportunity to complete any memory transfers which they required. Each port is identical except for a binary identification code that is used to represent each port. The system can accommodate as many ports as necessary and additional ports can be added at a subsequent time.