The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 31, 1998
Filed:
Dec. 12, 1995
Oded Cohn, Haifa, IL;
Richard Lewis Mattson, Pacific Grove, CA (US);
Jaishankar Moothedath Menon, San Jose, CA (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A log-structured array (LSA) includes a relatively large, non-volatile cache memory as well as a memory segment write buffer. The LSA cache memory contains both updated logical tracks received from the host system and also clean logical tracks read from direct access storage devices of the array. When the fraction of updated tracks in the cache memory exceeds a threshold value, updated tracks are moved from the LSA cache memory to the memory segment. With each modified track to be moved, adjacent modified tracks also are moved. The updated tracks are moved regardless of their location in the updated LRU list. Clean tracks in the LSA cache memory are moved into the memory segment as well, when additional clean tracks are needed in the cache memory. The clean tracks are selected from the bottom of the LSA cache clean track LRU list. Checking for adjacency also can occur at garbage collection time, performed in a background mode. The criterion for determining logical adjacency can use information from the host computer and can be changed dynamically to optimize performance.