Low power filter coefficient adaptation circuit for digital adaptive

Abstract

An adaptive filter for use in disk drive systems includes coefficient adaptation circuitry operating at a slower rate than the filter and consequently at a reduced power level. The adaptive filter receives input data samples corresponding to raw data read from a disk in the disk drive system and converted to digital form and provides processed output data samples. The action of the filter is defined by characteristic filter coefficients having values that are updated by adaptation circuitry during the operation of the filter. The adaptive filter is independently clocked from the adaptation circuitry, such that the input data samples and the processed output data samples are clocked through the adaptive filter at a clock rate 1/T, and the filter coefficients are updated according to a prescribed algorithm at an update rate slower than the 1/T clock rate. Filter coefficient updating occurs preferably at a rate equal to 1/J, where J is an integer greater than unity and generally in the range of 2 to 8. The coefficient update rate is achieved by providing a separate filter coefficient adaptation clock derived from the system clock by dividing that clock by a user-programmable parameter J. This process reduces the coefficient update rate, which in turn reduces the switching frequency of the logic gates, the number of pipeline latches, and, ultimately, the power consumption.