Programmable logic device having a sense amplifier with virtual ground

Abstract

A programmable logic device (PLD) is presented having an improved sense amplifier. The sense amplifier comprises a cascode-connected pair of transistors coupled between a sense amplifier output and a virtual ground. According to several embodiments, a clipping transistor and a current-channeling transistor can be provided with the sense amplifier to improve its operation. Further, additional current source and current sink transistors can also be added to the sense amplifier design. The clipping transistor helps ensure that any positive-going noise spikes do not deleteriously effect accurate readings of the true value on the input bit line. The current-channeling transistor helps prevent collapse of the bit line caused by significant conductivity of cells connected to the bit line. The combination of clipping and current-channeling provide a relatively narrow voltage range of the bit line voltage, resulting in fast recovery and high speed sensing thereof. The additional current source is used to impute additional current through the amplifying transistor of the cascode-coupled pair of transistors. The additional current sink transistor helps draw the current from the amplifying transistor to a ground supply. Only when the bit line voltage is high will the additional current source and current sink transistors be used.