The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 31, 1998
Filed:
Oct. 21, 1994
Frank Djennas, Austin, TX (US);
Wilhelm Sterlin, Austin, TX (US);
Bennett A Joiner, Jr, Austin, TX (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A low profile semiconductor device (24) is manufactured by mounting a semiconductor die (26) onto a substrate (28) using an interposer (30). The interposer couples an active surface (32) of the die (26) to conductive traces (33) on the top surface of the substrate. The interposer is directionally conductive so that electrical conductivity is limited to the z-direction through thickness of the interposer. The interposer both affixes the die to the substrate and provides the first level of interconnects for the device. The inactive surface (36) of the die can be exposed for efficient thermal dissipation. An optional heat spreader (50) may be added for increased thermal management. The device may be overmolded, glob-topped, capped, or unencapsulated. Separate die-attach and wire bonding processes are eliminated. A second level of interconnects are provided by either solder balls (38), solder columns (44), or pins (64).