The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 1998

Filed:

Apr. 01, 1996
Applicant:
Inventor:

Shinichi Kono, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395845 ; 36424231 ;
Abstract

Address generators output addresses of transfer data of transfer origin and destination DRAM's. Updating of the transfer addresses from the address generators during execution of DMA is performed based on a CAS signal from a timing signal generator. A delay element delays the CAS signal by a time which is the sum of an access time of the transfer origin DRAM and a data set-up time of the transfer destination DRAM. A transfer data counter counts the number of leading edges of the CAS signal while a RAS signal from the timing signal generator is held active. When a counted value reaches a preset value, the transfer data counter outputs continuous data transfer suspension information to the timing signal generator. With this arrangement, the halt in operation of a CPU due to continuous occupation of a bus is effectively prevented while achieving the increased data transfer rate.


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