The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 17, 1998
Filed:
Mar. 29, 1995
Satoshi Sato, Tokyo, JP;
Casio Computer Co., Ltd., Tokyo, JP;
Abstract
A bus interface circuit which can suppress generation of noise includes, between an internal data bus and an external data bus, an AND gate and output buffer connected in parallel with an input buffer. A control signal a is supplied to a control terminal of the output buffer and an inverted signal of the control signal a is supplied to a control terminal of the input buffer. A control signal b is supplied to one input terminal of the AND gate. When no access request is made to an external RAM and external ROM, a CPU enables the control signals a and b to be output as a high-level and a low-level signals, respectively. At that time, a respective output buffer enables corresponding data to pass through, but data on the internal data bus is not output to the external data bus when the AND gate is placed in closed state.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile