Hadamard transformer using memory cell

Abstract

A Hadamard transformer is disclosed which uses memory cells in a digital signal processor for restoring to the original signals at a receiving end from the signals which have been transformed to a Hadamard function sequenced at a transmitting end. The Hadamard transformer using memory cells includes a counter which receives sample data clocks to output counted signals to a memory address generator and to a plurality of adder/subtractors. The plurality of adder/subtractors add and subtract the input signals and the data read from a memory in accordance with the counted signals of the counter so as to write or record the results into the memory. The memory address generator generates memory addresses in accordance with the sample data clock and the counted signals so that the memory can be read and written to. The memory thus stores the data inputted and outputted to and from the plurality of sadder/subtractors in accordance with the memory addresses generated by the memory address generator. A comparitor compares the final output values of the adder/subtractors at each period of the Hadamard function sequence so as to detect the maximum likelihood of a Hadamard function sequence.