The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 1998

Filed:

Jun. 03, 1996
Applicant:
Inventor:

Toshio Isono, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
326 86 ; 326 34 ; 326 81 ;
Abstract

A three-state buffer operating at a 3V power source supplies a three-state signal to a bus line pulled up to a 5V power source line. The three-state buffer includes CMOS transistors each receiving an output signal from a pre-stage buffer arid a transfer gate connected between the output of the CMOS transistors and the output terminal of the integrated circuit. The back-gate of the p-channel transistor of the CMOS is maintained at an intermediate potential between the 3V source line and the ground line while being in a floating state. The intermediate potential is presented by a serial three transistors. A low power dissipation and a high speed operation can be obtained by the circuit.


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