The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 10, 1998
Filed:
Apr. 06, 1995
Shin-ichi Sawada, Osaka, JP;
Sumitomo Electric Industries, Ltd., Osaka, JP;
Abstract
When a film is formed on a wafer of groups III-V compound semiconductors by heating, slips are formed in the periphery of the wafer because of residual inner stress of the wafer. The quality of an epitaxially grown crystal is damaged by these slips. The residual stress of the wafer is caused by the residual stress generated in an inner part of an ingot at the time of growing a crystal. Therefore, it is an object to prepare a wafer in which no slips are generated when the epitaxial growth is carried out. In order to achieve this object, a method is provided in which; an ingot is heated and cooled in a range between an upper limit temperature T.sub.h, and a lower limit temperature T.sub.1 where the upper limit temperature ranges from more than 800.degree. C. to less than a melting point of a material of the ingot, and the lower limit temperature ranges from more than 800.degree. C. to less than the upper limit temperature T.sub.h. The reciprocating changing between of heating and cooling steps is repeated a plurality of times at a speed A of raising temperature and a speed B of lowering temperature where the speed A of raising temperature is lower than the speed B of lowering temperature. The residual stress is excluded by this heat-treatment method, and, consequently, no slips occur in the peripheral part of a wafer obtained by this invention.