The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 1998

Filed:

Aug. 07, 1995
Applicant:
Inventors:

Cory Ansel Cherichetti, Burlington, VT (US);

Peter Stewart Colyer, Essex Junction, VT (US);

David Robert Stauffer, Milton, VT (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; H03K / ;
U.S. Cl.
CPC ...
39518304 ; 371 226 ; 307407 ; 3241581 ;
Abstract

A test mode matrix circuit in an integrated circuit switches signal lines internal to the integrated circuit in a manner that allows an embedded microprocessor within the integrated circuit to be fully functionally tested using standard test vectors applied to the integrated circuit, and which allows for debugging the code written for an embedded microprocessor core by connecting an in-circuit emulator (ICE) to the integrated circuit. The test mode matrix circuit operates in a number of mutually exclusive modes, each of which is suitably selected via control signal inputs to the test mode matrix. The test mode matrix circuit couples signals from the embedded microprocessor to the application-specific logic without passing through off-chip drivers/receivers. Multiple microprocessors and corresponding test mode matrices may also be implemented on the same integrated circuit.


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