The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 03, 1998
Filed:
Jun. 24, 1996
Colin Stewart Bill, Cupertino, CA (US);
Ravi Prakash Gutala, Sant Clara, CA (US);
Qimeng Derek Zhou, Sant Clara, CA (US);
Jonathan Shichang Su, Sunnyvale, CA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
A shift register page buffer for use in an array of multiple bits-per-cell flash EEPROM memory cells so as to render page mode programming and reading is provided. A sensing logic circuit (26,27) is used to selectively and sequentially compare array bit line voltages with each of a plurality of target reference cell bit line voltages. Shift register circuit (300) is responsive to the sensing logic circuit for sequentially storing either a low or high logic level after each comparison of the bit line voltages with one of the plurality of target reference voltages. Each of the shift register circuits is formed of series-connected latch circuits (302-308), each having inputs and outputs. A switching transistor (N5) is interconnected between the sensing logic circuit and the latch circuits and is responsive to a corresponding output of the latch circuits for selectively passing the logic signal from the sensing circuit means to the input of the latch circuits.