Low skew remote absolute delay regulator chip

Abstract

A remote delay regulator circuit measures the effects of intrinsic propagation delays experienced by a system clock signal propagating through an extended clock distribution path that encompasses a clock repeater chip, a module transmission network and a clock distribution network of an integrated circuit (IC) chip. Delay measurement of the associated (IC) chips on the module is provided by sensing the clock signal at the beginning of the network and at the end of the network. The BEFORE and AFTER sense taps are routed to a signal generation circuit on the repeater chip where measurement signals are generated that define the beginning and end of a measurement cycle. A clock delay path circuit on the repeater chip contains the logic circuitry required to measure and compensate for the actual measured intrinsic propagation delays of the total clock transmission network. The repeater chip includes an additional unconnected, but identically loaded, delay line connected to turn on whenever any of the delay lines turns off, thereby preventing power surges and power supply voltage noise, and reducing temperature variations.