The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 10, 1998
Filed:
Nov. 19, 1996
Applicant:
Inventors:
Robert L Stokes, Redondo Beach, CA (US);
William D Farwell, Thousand Oaks, CA (US);
Assignee:
Hughes Electronics, Los Angeles, CA (US);
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R / ; G06F / ;
U.S. Cl.
CPC ...
371 2235 ; 371 2232 ;
Abstract
A boundary scan test circuit that includes Y scan flip-flops serially connected in a sequence from a first scan flip-flop to a Y.sup.th scan flip-flop and clocked with a system clock signal, and circuitry for providing scan input data to the first scan flip-flop synchronously with a test clock signal and for receiving scan output data from the Y.sup.th scan flip-flop synchronously with the test clock signal, wherein the test clock signal and the system clock signal have a test clock period to system clock period ratio that is equal to any fixed integer ratio M.