The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 10, 1998

Filed:

Apr. 12, 1996
Applicant:
Inventor:

Yves Dufour, Sunnyvale, CA (US);

Assignee:

U.S. Philips Corporation, New York, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
326127 ; 326126 ; 326 80 ;
Abstract

The invention relates to a logic circuit of the emitter-coupled type. For operation with a low supply Voltage, for example a single battery element, the bases of the transistors (Q1, Q2) forming a differential pair receive the input signal (Vi, Vi) via a coupling capacitance (C1, C2), a low-frequency bias being provided by means of MOS transistors (M1, M2) driven by input signals opposed to those applied to the corresponding bases, said MOS transistors being coupled to a line (3) at a voltage (vb) higher than the supply voltage (V1) supplied by a generator (10) provided for this function.


Find Patent Forward Citations

Dufour, Yves. (1998). Logic circuit of the emitter-coupled type, operating at a low supply (U.S. Patent No. 5717347). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5717347

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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