The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 10, 1998
Filed:
Mar. 24, 1995
David John Pedder, Warwickshire, GB;
Abstract
A ball grid array arrangement comprises a dielectric multilayer substrate, in a lower metallization layer of which is disposed an array of solder balls. A passive circuit element is integrated into at least one of the metallization layers. The arrangement may be either a discrete component consisting of a triplate transmission-line resonator or interdigitated filter integrated into an inner metallization layer and defined by that layer in conjunction with adjacent layers, or it may take the form of an IC carrier or multichip-module carrier having such transmission structures situated within a central die-attach area of the substrate and having also a peripheral area containing bonding structures for the mounting of at least one chip or chip module. There will normally be at least two groups of such bonding structures, and a passive circuit element in the form of an inductor may be formed in the upper metallization layer between adjacent groups of bonding structures.