The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 03, 1998
Filed:
May. 21, 1992
Hugh Andrew Lagle, III, Raleigh, NC (US);
Duane Richard Remein, Raleigh, NC (US);
James Michael Preston, Raleigh, NC (US);
William Christian Staton, Cary, NC (US);
William B Weeber, Apex, NC (US);
Alcatel Network Systems, Inc., Richardson, TX (US);
Abstract
A SONET formatter circuit (10) receives a parallel STS-1** TX signal (19) from a highspeed interface module. The STS-1** TX signal (19), which contains a floating VT group payload, is demultiplexed into seven parallel VT groups (33). These seven parallel VT groups (33) are converted to serial by a parallel to serial converter (34) and transmitted serially to lowspeed interface modules as DEMUX direction VT group data signals (42, 43). The SONET formatter circuit (10) also receives serial MUX direction VT group data signals (68, 69) from lowspeed interface modules. These serial VT group data signals (68, 69) are converted to seven parallel VT groups (89) by a serial to parallel converter (64). These seven parallel VT groups (89) are multiplexed with overhead data (84) into a parallel STS-1** RX signal (50) which is transmitted to a highspeed interface module. To maintain continuous VT group frame transmissions, a VT group clock generation circuit (72) is required.