Scalable crt display device and phase synchronous circuit for use in

Abstract

A CRT display device capable of displaying a signal from the existing image signal source, in which a vertical frequency is approximately fixed and a horizontal frequency is widely distributed beyond a ratio of 3:1, on one image screen. The CRT display device includes a scan converter unit and a display unit. The scan converter unit includes an output horizontal frequency unifying circuit, a horizontal blanking period ratio converting circuit, a vertical frequency converting unit and a vertical blanking period ratio converting circuit. The display unit includes a vertical deflection circuit and a circuit for correcting a vertical S-shaped distortion. In a phase synchronous circuit, a lock-out detector is connected to an output of a three state output digital phase detector, and on the basis of an output thereof, a switch is subjected to the 'ON'/'OFF' control. For a period of time when an output of the lock-out detector indicates a lock-out state, a loop gain of the PLL is increased and the pull-in time is shortened. For the remaining periods of time, i.e., in the steady state, the loop gain is decreased and the noise resistance characteristics are improved.