The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 27, 1998
Filed:
Nov. 20, 1996
John M Spickler, Marietta, PA (US);
Kazutoshi Amano, Tokyo, JP;
Chih-Hui Hsia, Taipei, TW;
Lein Wan Lu, Tao-Yuan Hsien, TW;
Berg Technology, Inc., Reno, NV (US);
Abstract
A memory card connector which comprises a header (210, 210') and a carrier connected to the header, wherein the header is provided with a plurality of pins extended in both inward and outward directions. The inward pins are used for inserting a memory card to be received in the carrier. A vertical circuit board (214, 214') is electrically and securely connected to the outward pins of the header. The lower end of the vertical circuit board is detachably inserted into a connector (203, 203') securely mounted to the surface of a mainboard for electrical connection. Alternately a horizontal circuit board may be used to which the outward pins are diagonally attached and which is connected to the mainboard by a vertical connector. The height of the circuit board can be set according to the requirement of a specific application of the memory card connector so that the space between the memory card connector and the mainboard can be properly utilized. The outward pins are shielded by means of a conductive shield (322, 322' or 522, 522') and that conductive shield is grounded to the mainboard through a ground plane in the vertical or horizontal circuit board. The ground plane is interposed between signal planes in parallel, spaced and equal distance relation between two signal planes. One group of outward extending pins is connected to each of the signal planes to control impedance.