The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 13, 1998
Filed:
Dec. 20, 1996
Cheng P Wen, Mission Viejo, CA (US);
Wah S Wong, Montebello, CA (US);
William D Gray, Redondo Beach, CA (US);
Hughes Aircraft, Los Angeles, CA (US);
Abstract
A high power, flip-chip microwave monolithic integrated circuit (MMIC) assembly (30) has a high power microwave monolithic integrated circuit (MMIC) having a surface with an active area (72) in which heat is generated. The assembly also has a host substrate (34). A thermally conductive bump (51) formed over the surface of the MMIC has a first portion (51') in close proximity to and in thermal communication with the active area (72) of the MMIC and a second portion (51') which is in close proximity to and in thermal communication with the host substrate (34). The second portion (51') of the thermal bump (51) has a greater cross-sectional area than the first portion (51'). A multi-layer, multi-exposure method of manufacturing the improved thermal bump (51) includes several steps. A plating membrane (80) is formed on a surface of the MMIC (32). A first layer of negative photoresist is applied to the surface of the plating membrane (80), and is exposed with a first masked pattern of light. A second layer of negative photoresist is applied on top of the first layer of photoresist. The second layer of negative photoresist is exposed with a second masked pattern of light. Unexposed areas of the first and second layers of photoresist form a 'T' shape. The first and second layers of photoresist are developed with a photoresist developer, thereby leaving a 'T'-shaped via in the photoresist. An electrically and thermally conductive metal is plated onto the plating membrane and into the via to form a substantially 'T'-shaped bump (51), which is then attached to a host substrate. The resulting bump has greater cross-sectional area at the host substrate than at the MMIC (32).