System for reallocation of memory banks in memory sized order

Abstract

A global standby System Management Interrupt ('SMI) is supplied to a CPU when all hardware interrupt requests (except a timer interrupt) are not generated for four seconds. The SMI routine sets the CPU to a stop grant state whereby the CPU goes to a sleep mode. Thus, the same sleep mode function is provided regardless of the operating system environment. Memory banks are reallocated in the DRAM logical address space in memory-size order such that a smaller address range is allocated to a bank with a larger memory size. For any address range allocated to any DRAM bank, there is a sequence of bits having a common value associated with all the memory address values belonging to the address range. Each sequence of bits is used as a decoding condition for the associated address strobe line. The memory address space of the CPU is separated into a plurality of memory address areas. Each memory address area has attribute information indicating the type of memory device to be allocated set in an attribute register file. When a bus cycle for a memory access is executed by the CPU, the attribute information in the memory address area corresponding to the value of the memory address from the CPU is read from the attribute register file and the type of the memory device to be accessed is determined by this attribute information.