The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 06, 1998

Filed:

Dec. 21, 1995
Applicant:
Inventors:

Thomas A Freeburg, Arlington Heights, IL (US);

John Ley, McHenry, IL (US);

Anne M Pearce, Barrington, IL (US);

Gary Schulz, Cary, IL (US);

Paul Odlyzko, Arlington Heights, IL (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L / ; H03C / ; H04L / ;
U.S. Cl.
CPC ...
331 14 ; 331-2 ; 331 17 ; 331 23 ; 331 25 ; 332100 ; 332127 ; 375275 ; 375307 ; 455343 ;
Abstract

A frequency-locked loop (100) employs a controllable oscillator (102) for generating an output signal having a frequency, optional sampler (104), coupled to oscillator (102), for sampling the frequency of the output signal, a divider (106), coupled to optional sampling circuit (104), for dividing the output signal frequency to generate a prescaled signal and a microprocessor (108), coupled between the divider 106 and oscillator (102), for comparing the prescaled signal to a reference signal and generating a control signal for correcting frequency shifts based upon the comparison. The control signal generated by microprocessor (108) is non-continuous. During that time when microprocessor (108) generates no control signals, power is removed from various frequency-locked loop circuitry.


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