The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 30, 1997
Filed:
May. 05, 1995
David Elson Douse, Jericho, VT (US);
Wayne Frederick Ellis, Jericho, VT (US);
Erik Leigh Hedberg, Essex Junction, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A programmable self-time refresh circuit for a semiconductor memory and methods for programming the self-refresh rate for non-invasively and deterministically testing the self-timed refresh circuit for establishing/verifying a refresh rate and a wait state interval for the self-refresh operation. The programmable refresh circuit includes a self-timed oscillator that outputs a clocking signal, and a programmable pattern generator that outputs a first signal pattern and a second signal pattern. The first signal pattern is fed to a counter circuit which also receives the clocking signal. The counter circuit outputs a signal pulse whenever the count driven by the clocking signal reaches a digital pattern representation corresponding to the first signal pattern generated by the programmable pattern generator. Refresh control logic is connected to receive the pulse signal and respond thereto by refreshing a portion of the memory array of the semiconductor memory device. The second signal pattern is employed by the refresh control logic to set the wait state interval for the self-refresh operation. Multiple methods for testing the programmable self-refresh circuit are also set forth.