The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 23, 1997
Filed:
Jan. 16, 1996
Masanori Tsukamoto, Kanagawa, JP;
Tetsuo Gocho, Kanagawa, JP;
Sony Corporation, Tokyo, JP;
Abstract
A method of forming a multi-layer interconnection in which through-holes are formed in an interlayer insulating layer positioned between two neighboring mid interconnection layers, which through-hole is used for establishing an electrical interconnection between upper and lower interconnection layers, comprising the steps of forming an offset insulating film on said mid interconnection layer such that the patterns of the mid interconnection layer and the offset insulating film are the same; forming a sidewall insulating film on the lateral wall surface of a pattern made up of said mid interconnection layer and the offset insulating film; substantially conformally forming an etch stop layer covering the entire surface of the substrate, said etching stop layer being slower in etch rate than said interlayer insulating film; anisotropically etching said interlayer insulating film in a region having an opening size smaller than the spacing between the interconnecting layers; selectively removing the etching stop layer exposed on the bottom surface of said region for completing the through-hole; and filling said through-hole with an electrically conductive material.