The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 16, 1997

Filed:

Jun. 23, 1993
Applicant:
Inventors:

Jim M Seto, North York, CA;

Roger P Colbeck, Whitby, CA;

Raymond Chau, Toronto, CA;

Simon C Leung, Markham, CA;

Assignee:

ATI Technologies Inc., Thornhill, CA;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L / ;
U.S. Cl.
CPC ...
375376 ; 375374 ; 327157 ;
Abstract

A phase locked loop is comprised of a phase-frequency detector for providing to a charge pump up and down pulse signals having pulse widths proportional to phase differences between a pair of signals applied thereto, apparatus for introducing a relative phase difference between a first clock signal and a second signal to provide the pair of signals, the second signal being synchronized with an output signal of the loop, apparatus for providing a third up or down signal to the charge pump offsetting the effect of the introduced phase difference, and apparatus for obtaining a loop control voltage from the charge pump.


Find Patent Forward Citations

Seto, Jim. (1997). Phase offset cancellation technique for reducing low frequency jitters (U.S. Patent No. 5699387). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5699387

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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