The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 09, 1997
Filed:
Apr. 25, 1995
Craig R Church, Havertown, PA (US);
Duane J McCrory, Malvern, PA (US);
Joseph S Schibinger, Phoenixville, PA (US);
Laurence P Flora, Valley Center, CA (US);
Unisys Corporation, Blue Bell, PA (US);
Abstract
A low latency software and hardware interface between a microprocessor and Network Interface Unit is disclosed. The Network Interface Unit interfaces to the microprocessor's Level 2 cache interface, which provides burst transfers of cache lines between the microprocessor and Network Interface Unit. The Network Interface Unit is memory mapped into the microprocessor's address space. Two memory mapped cache lines are used to write commands to the Network Interface Unit's Write Window and another two cache lines are used to read results of the commands from the Network Interface Unit's Read Window. The Write Window is a three port register file. Data is written into one write port and read simultaneously from two read ports. One read port is used during read operations to the Write Window while the other is used during command execution to move data to the Internal Structures block. The Read Window is a 2-1 multiplexor that is 128 bits wide. On a read operation data may be selected from the Write Window or the Internal Structures.