Memory chip architecture for digital storage of prerecorded audio data

Abstract

A memory device for digital storage of pre-recorded audio. Contained within a housing adapted for insertion into a solid state audio player is an array of memory cells for storage of digitally recorded audio. Each of the memory cells is individually addressable over a parallel address bus and data is read and/or written over a parallel data bus. Data is transmitted to and from the device by means of a serial interface with the solid state audio player. Shift registers within the memory device are coupled to the serial interface for transmitting serial data to and receiving serial data from the audio player. Data buffers are interposed between the address bus, data bus and respective shift registers for storing data to be placed on the address bus and receiving data from the data bus. In accordance with one aspect of the invention, a series of capacitive plates is included to provide a contact-less interface between the memory device and the associated solid state audio player.