The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 09, 1997

Filed:

Dec. 22, 1994
Applicant:
Inventor:

Daniel J Becker, Broomfield, CO (US);

Assignee:

Valleylab Inc, Boulder, CO (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
A61B / ;
U.S. Cl.
CPC ...
606 33 ; 606 32 ;
Abstract

Apparatus monitors RF return current to maximize the AC signal of impedance at two return electrodes. A transformer with driving and driven windings isolates ESU and patient. At ends of the driving winding are signal and ground terminals joined to the return electrodes with capacitors returning current. An AC coupling capacitor at the signal terminal has a timing circuit in sync to the voltage wave and relative to impedance of the return electrodes. Microprocessing the voltage at the signal terminal of the driving winding watches impedance and determines if the RF return current path is adequate. Voltage detection within the timing circuit has a voltage shaping circuit. A voltage comparator after the voltage detection forms a square wave. A current detection circuit and a coupling capacitor allow AC flow to the driving winding. Current shaping circuit in the current detection circuit has a voltage comparator at the output to form a square wave. Phase detection at the voltage and current detection circuits outputs filters the phase difference that is sampled and held as DC input to a switch, with an output and a few inputs to DC voltages. Phase locking an oscillating voltage source directly and/or through the sample and hold or DC switch tunes oscillation frequency and maximizes the voltage detection circuit output. Monitoring the return current with a signal from the voltage detection circuit connected to an oscillating voltage that is phase locked to the current phase therein shows that no phase difference and maximum signal voltage occur simultaneously.

Published as:
WO9619152A1; AU3879895A; DE29580748U1; US5695494A; JPH10500605A;

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