The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 25, 1997
Filed:
Sep. 25, 1996
Applicant:
Inventor:
Eiji Kozuka, Yokohama, JP;
Assignee:
Kabushiki Kaisha Toshiba, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
257693 ; 254 48 ; 254724 ; 254784 ; 254786 ;
Abstract
Normal and reverse IC patterns are each a mirror image of the other. The normal and reverse IC patterns are simultaneously formed on a semiconductor wafer and are simultaneously tested. The wafer with these IC patterns is cut into chips, which are packaged. The normal and reverse IC packages show identical parasitic impedance and uniform performance.
Kozuka, Eiji. (1997). Integrated circuits having patterns of mirror images and packages (U.S. Patent No. 5691570). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5691570
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile