The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 25, 1997

Filed:

Sep. 15, 1995
Applicant:
Inventors:

Ming-Chien Chang, Hsinchu, TW;

Hong-Hsiang Tsai, Hsinchu, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 27 ; 437 29 ; 437 40 ; 437 44 ;
Abstract

A low capacitance input/output integrated circuit and a method by which the low capacitance input/output integrated circuit is formed. Formed upon a semiconductor substrate is an input/output integrated circuit which contains a minimum of one integrated circuit device. The integrated circuit device, in turn, possesses at minimum a source electrode and a drain electrode of the same polarity. Coincident with the source electrode and the drain electrode are normally at least one ion implant of polarity opposite to the source electrode and the drain electrode. At least a portion of the drain electrode is masked when the ion implant(s) of polarity opposite to the source electrode and the drain electrode are provided into the source electrode region and the drain electrode region of the integrated circuit device(s).


Find Patent Forward Citations

Chang, Ming-Chien. (1997). Low capacitance input/output integrated circuit (U.S. Patent No. 5691213). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5691213

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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