The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 25, 1997

Filed:

Mar. 11, 1996
Applicant:
Inventor:

Hiroshi Nakaya, Hamamatsu, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
1566261 ; 1566441 ; 1566561 ; 15665911 ; 437-8 ; 216 59 ;
Abstract

A reticle pattern is transferred to a semiconductor wafer with a coated resist film by using a reduction (demagnification) exposure system having a focus sensor and an autofocus mechanism operating in response to an output of the focus sensor. An average level of a plurality of autofocus points in a chip area is calculated while the semiconductor wafer is mounted on a stage. The semiconductor wafer is scanned and levels of the surface in the chip area are sampled. From the distributions of sampled surface levels, a stepped surface level to be focussed is derived. An offset value between the average level and the stepped surface level to be focussed is derived and an autofocus point is corrected by the offset value to expose the chip area of the semiconductor wafer. A method of exposing a semiconductor wafer is provided which can perform an exposure most suitable for each process, by identifying a stepped surface level to be automatically focussed.


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