Dummy cell for providing a reference voltage in a memory array

Abstract

A dummy cell in a memory array. The memory array includes a storage element for storing one of a first and a second state. The storage element is coupled to circuitry for reading the first or second state from the storage element. The storage element draws a first current when the first state is read by the circuitry. The storage element and circuitry are further coupled to the dummy cell which provides a reference voltage when the circuitry reads the first or second state from the storage element. The dummy cell draws a second current when the circuitry reads the first or second state from the storage element. The second current is not equivalent to the first the first current. In one embodiment, the dummy cell draws approximately half the current that the storage element draws when the circuitry reads the first state from the storage element. In another embodiment, the dummy cell includes a pass transistor which has a width which is approximately half the width of a pass transistor included in the storage element. In still another embodiment, the dummy cell includes a pass transistor which has a length which is approximately twice the length of a pass transistor included in the storage element.